diff --git a/src/lib.rs b/src/lib.rs
index 23a6f6b..2fc1478 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -16,7 +16,8 @@
 #![cfg_attr(feature = "simd_opt", feature(cfg_target_feature))]
 #![cfg_attr(feature = "simd_asm", feature(asm))]
 
-#[cfg(all(feature = "bench", test))] extern crate test;
+#[cfg(all(feature = "bench", test))]
+extern crate test;
 
 extern crate constant_time_eq;
 
diff --git a/src/simd_opt/u32x4.rs b/src/simd_opt/u32x4.rs
index cd0cdca..b6c42d0 100644
--- a/src/simd_opt/u32x4.rs
+++ b/src/simd_opt/u32x4.rs
@@ -15,7 +15,7 @@ pub fn rotate_right_const(vec: u32x4, n: u32) -> u32x4 {
     match n {
         16 => rotate_right_16(vec),
          8 => rotate_right_8(vec),
-        _ => rotate_right_any(vec, n),
+         _ => rotate_right_any(vec, n),
     }
 }
 
diff --git a/src/simd_opt/u64x4.rs b/src/simd_opt/u64x4.rs
index a40171e..ef55585 100644
--- a/src/simd_opt/u64x4.rs
+++ b/src/simd_opt/u64x4.rs
@@ -16,7 +16,7 @@ pub fn rotate_right_const(vec: u64x4, n: u32) -> u64x4 {
         32 => rotate_right_32(vec),
         24 => rotate_right_24(vec),
         16 => rotate_right_16(vec),
-        _ => rotate_right_any(vec, n),
+         _ => rotate_right_any(vec, n),
     }
 }
 
diff --git a/src/simdty.rs b/src/simdty.rs
index d8499f7..eaa01f1 100644
--- a/src/simdty.rs
+++ b/src/simdty.rs
@@ -7,7 +7,6 @@
 
 #![allow(dead_code)]
 #![allow(non_camel_case_types)]
-#![cfg_attr(feature = "clippy", allow(inline_always))]
 
 #[cfg(feature = "simd")]
 macro_rules! decl_simd {
@@ -63,6 +62,7 @@ pub type u16x16 = Simd16<u16>;
 
 pub type u8x32 = Simd32<u8>;
 
+#[cfg_attr(feature = "clippy", allow(inline_always))]
 impl<T> Simd4<T> {
     #[inline(always)]
     pub fn new(e0: T, e1: T, e2: T, e3: T) -> Simd4<T> {